UVM Jobs

Gate Level Simulation Design Verification Engineer

DFX/DFT Verification Engineer

Design Verification Engineer - ASIC/SoC

PCI-e Design Verification Engineer - Ethernet/CXL/USB/UVM

Design Verification Engineer - UVM/ASIC

Senior ASIC Verification Engineer - SoC Development

DFX Engineer - UVM/System Verilog

Technical Lead/Principal DV Engineer - Test Automation Architecture

DFX Verification Engineer

Senior Verification Engineer - ASIC

Senior ASIC Verification Engineer

ASIC/RTL Design Engineer II - CPU Design Verification

Sima.ai Technologies - Member Technical Staff - DDR Design Verification

Semtech - Senior Staff Verification Engineer - System Verilog

Core Verification Engineer - UVM

Mirafra Technologies - SoC Design Verification Engineer

SoC Verification Engineer

Tenstorrent - Staff Engineer - CPU Verification

Tenstorrent - Senior Design Verification Engineer - System Verilog

ASIC Verification Lead - SoC