UVM Jobs

Subject Matter Expert - FPGA/RTL

Silicon Labs - Lead Engineer - Design Verification

ASIC Design Verification Engineer - Verilog/UVM

Senior Engineer I - SoC Design

Qualcomm Technologies - Senior Staff Design Verification

Swedium Global - Senior ASIC Verification Engineer - UVM/System Verilog

Swedium Global - Senior ASIC Verification Engineer

Senior Design Verfication Engineer - UVM/System Verilog

Proxelera - Senior/Principal ASIC Design Verification Engineer - SoC/Subsystem

Gate Level Simulation Design Verification Engineer

DFX/DFT Verification Engineer

Design Verification Engineer - ASIC/SoC

PCI-e Design Verification Engineer - Ethernet/CXL/USB/UVM

Design Verification Engineer - UVM/ASIC

Senior ASIC Verification Engineer - SoC Development

DFX Engineer - UVM/System Verilog

Technical Lead/Principal DV Engineer - Test Automation Architecture

DFX Verification Engineer

Senior Verification Engineer - ASIC

Senior ASIC Verification Engineer