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VLSI Backend Architect - ASIC/DFT

Space Experts Wealth Advisor
11 - 25 Years
Multiple Locations

Posted on: 07/07/2026

Job Description

Role Overview :


As a VLSI Backend Architect, you will serve as the technical authority for complex ASIC design cycles, overseeing the transition from netlist to GDSII. You will work closely with cross-functional design teams, silicon validation engineers, and project stakeholders to ensure that high-performance chips meet stringent power, performance, and area (PPA) targets. Your daily focus involves navigating complex design challenges, mentoring senior engineering staff, and driving architectural decisions that directly impact the reliability and market readiness of next-generation semiconductor products. This role is pivotal in maintaining the firm's reputation for technical excellence in the competitive Bangalore and Hyderabad semiconductor hubs.

Key Responsibilities :

- Lead the end-to-end physical design implementation for complex ASIC projects to ensure high-quality tape-outs within aggressive timelines.

- Architect robust floorplanning strategies that optimize for signal integrity, power distribution, and thermal management in advanced process nodes.

- Drive comprehensive timing closure by implementing advanced Static Timing Analysis (STA) methodologies to mitigate risks in high-frequency designs.

- Oversee the integration of Design for Test (DFT) structures to ensure maximum fault coverage and yield optimization during the manufacturing phase.

- Resolve complex physical verification issues including DRC and LVS violations to ensure seamless silicon fabrication.

- Mentor senior engineering teams on industry best practices and innovative EDA tool utilization to improve overall design cycle efficiency.

Required Skillset :

- Demonstrated mastery in Physical Design and ASIC implementation, with a proven track record of successfully delivering complex chips from RTL to GDSII.

- Deep technical proficiency in Static Timing Analysis and timing closure techniques, with the ability to troubleshoot complex timing paths in multi-million gate designs.

- Extensive experience with industry-standard EDA tools, maintaining a high level of adaptability to evolving design methodologies and toolsets.

- Strong analytical and problem-solving abilities, capable of addressing intricate floorplanning and power-grid design challenges.

- Exceptional communication and leadership skills, with the ability to articulate technical strategies to stakeholders and guide high-performing engineering teams.

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