Job Description :
Role : System C Modelling Engineer
Experience : 4 - 9 Years
Location : Remote
About the Role :
We are looking for a skilled SystemC Modelling Engineer with strong expertise in SystemC/TLM based virtual platform development, C/C++ programming, and SoC architecture modelling. The ideal candidate should have hands-on experience in creating high-performance transaction-level models for embedded systems and semiconductor platforms.
The role involves working closely with architecture, verification, firmware, and hardware teams to build accurate and scalable system-level models for next-generation SoCs and automotive platforms.
Roles & Responsibilities :
- Develop and maintain SystemC/TLM models for SoC components, peripherals, and subsystems.
- Design and implement virtual platforms and transaction-level simulations.
Model and simulate :
1. Processors
2. Memory subsystems
3. Bus architectures
4. Interconnects
5. SoC peripherals
- Work on AMBA/AXI/AHB/APB/OCP/NoC protocols and related architectures.
- Collaborate with architecture and RTL teams for system-level modelling and validation.
- Optimize simulation performance and improve modelling accuracy.
- Develop reusable modelling frameworks and verification utilities.
- Perform debugging, profiling, and performance analysis of SystemC environments.
- Support software bring-up and pre-silicon validation activities.
- Contribute to documentation, code reviews, and best engineering practices.
The job is for:
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Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1644017