Role Overview:

As a Senior Verification Engineer, you will be at the heart of our silicon development lifecycle, ensuring the functional integrity of complex ASIC designs.

You will lead the verification strategy for high-performance chips, working closely with architecture, design, and DFT teams to identify bottlenecks and guarantee first-pass silicon success.

By architecting robust testbenches and driving rigorous verification cycles, you will directly influence the quality of our products, ensuring they meet the stringent performance and reliability standards expected by our global customers.

This role is based in Bangalore and requires a collaborative mindset to navigate cross-functional dependencies in a fast-paced, innovation-driven environment.

Key Responsibilities :

- Architect and implement advanced UVM-based testbenches to verify complex ASIC blocks, ensuring comprehensive functional coverage and high-quality design sign-off.

- Collaborate with design and DFT teams to define verification plans, ensuring that ATPG and scan-chain requirements are integrated early to minimize post-silicon issues.

- Develop and maintain automated verification flows using Perl, Python, and Shell scripting to accelerate regression testing and improve overall productivity.

- Mentor junior engineers by conducting design reviews and sharing best practices in SystemVerilog and verification methodology to elevate the technical caliber of the team.

- Drive the debugging process for complex failures, working across mixed-signal boundaries to isolate root causes and implement effective, long-term design fixes.

Required Skillset:

- Demonstrated expertise in building scalable verification environments using SystemVerilog and UVM, with a deep understanding of constrained random verification and assertion-based methodologies.

- Proven ability to script complex automation tasks using Python, Perl, and Shell to streamline verification workflows and manage large-scale regression suites.

- Strong technical background in DFT and ATPG principles, with the ability to bridge the gap between functional verification and manufacturing test requirements.

- Hands-on experience with FPGA prototyping and mixed-signal verification, showcasing an ability to handle multi-domain design challenges effectively.

- Excellent communication skills to articulate technical roadblocks to stakeholders and lead cross-functional discussions in a collaborative, hybrid work environment.

- A Bachelor's or Master's degree in Electronics or Electrical Engineering, backed by 8 to 15 years of professional experience in the semiconductor industry.