Posted on: 16/07/2026
Job Title : Senior Physical Design (PnR) Engineer
Experience : 5+ Years
Location : Hyderabad / Bangalore
Key Responsibilities :
- Perform complete Physical Design implementation using Synopsys Fusion Compiler (FC).
- Execute end-to-end Place & Route (PnR) flow, including :
1. Floorplanning
2. Power Planning
3. Placement
4. Clock Tree Synthesis (CTS)
5. Routing
6. Physical Optimization
7. Timing Closure
8. Signoff Readiness
- Work on PnR TFM (Technology Flow Methodology) and optimize implementation flows.
- Analyze and resolve timing, congestion, power, IR drop, electromigration, and DRC/LVS issues.
- Optimize designs for performance, power, and area (PPA).
- Collaborate with RTL, DFT, STA, CAD, and Verification teams to achieve design closure.
- Develop, maintain, and enhance Physical Design automation flows and methodologies.
- Debug implementation issues and recommend improvements to design methodologies.
- Ensure successful tape-out by meeting project quality, schedule, and performance targets.
- Support CAD teams in developing and improving Physical Design infrastructure and automation.
- Create and maintain implementation documentation and best practices.
Required Skills :
- 5+ years of experience in ASIC/SoC Physical Design.
- Strong hands-on expertise in Place & Route (PnR).
- Excellent experience with Synopsys Fusion Compiler (FC).
- Strong understanding of complete Physical Design flow.
- Experience working on PnR TFM (Technology Flow Methodology).
- Good knowledge of Physical Design optimization techniques.
- Experience with timing closure and physical signoff methodologies.
- Strong understanding of :
1. Floorplanning
2. Placement
3. CTS
4. Routing
5. ECO implementation
6. Timing optimization
7. Congestion analysis
- Knowledge of Physical Verification concepts including DRC, LVS, IR Drop, and EM.
- Experience with Tcl/Shell scripting for automation is an added advantage.
- Familiarity with Linux/Unix environments.
Preferred Skills :
- Strong CAD background with Physical Design methodology expertise.
- Experience working on advanced technology nodes.
- Knowledge of low-power implementation techniques.
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Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1654575