Posted on: 20/08/2026
We're Hiring : Hardware Design Engineer
The Role :
As a contractor with the AMD CAD team, you will work with experts on the development and support of timing and gate-level power flows.
Key Responsibilities :
- Timing analysis and gate-level power analysis flow development and support, with a focus on Synopsys Primetime and PrimePower tools
- Maintain and add enhancements to the AMD timing and power analysis code flow
- Work closely with design teams and EDA vendors to debug and fix issues in the flow and tools
- Regressions to benchmark new Primetime tool versions and PrimePower feature updates
Required Skills :
- Gate-Level Power Analysis
- PTPX, PrimePower
- Timing Analysis and Physical Design
- STA, Timing Signoff and Physical Design
- Full-chip Timing Methodology
- Physical Design Implementation
- Scripting : TCL, Perl, or Python
Preferred Experience :
- Experienced professional with 3 - 4 years industry experience in STA, timing signoff, and physical design
- Expertise in gate-level power analysis tools like PtPx, PrimePower
- Expertise in full-chip timing methodology
- Good understanding of Physical Design implementation
- Good scripting skills in TCL, Perl, or Python
Academic Credentials : Bachelors or Masters degree in Computer Engineering or Electrical Engineering
Did you find something suspicious?
Posted by
Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1664658