Job Description:

We are looking for an experienced FPGA Design Engineer with strong expertise in RTL design, FPGA development, and wireless communication physical-layer (PHY) technologies. The candidate will be responsible for designing, developing, implementing, and verifying FPGA-based digital signal processing and baseband processing solutions for 4G LTE and 5G NR wireless communication systems.

Key Responsibilities:

- FPGA Design, RTL Coding (Verilog or VHDL), PHY / Layer 1 with 4G, 5G

- Hands-on experience in FPGA RTL design and development.

- Understanding of digital logic design, FSM, FIFO, RAM, and CDC.

- Experience with Vivado, Vitis, Quartus, ModelSim, or Questa.

- Knowledge of FPGA timing constraints and timing closure.

- Experience in RTL verification and testbench development.

- Experience with 4G LTE and 5G NR baseband processing.

- Knowledge of 3GPP TS 36-series and TS 38-series specifications.

- Experience with LDPC and Polar coding implementations.

- Knowledge of massive MIMO and beamforming.

- Familiarity with O-RAN architecture and 5G Radio Units.

- Experience with high-speed ADC/DAC and JESD204 interfaces.

- MATLAB/Simulink-based algorithm development and verification.

Tech Stack:

- Verilog, SystemVerilog, VHDL

- Vivado, Vitis, Quartus, ModelSim, Questa

- MATLAB, Simulink