About this opportunity :

We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we don't just follow industry trendswe set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies.

As part of our global R&D organization, you'll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork.

Creative Freedom : Immerse yourself in an environment that champions innovation and critical thinking. You'll have the opportunity to explore advanced design technologies alongside skilled experts.

Global Impact : Contribute to projects with far-reaching impacts, transforming industries, advancing digital economies, and enhancing communication worldwide.

Work-Life Balance : We prioritize the well-being of our team members, offering a balanced work-life environment to help you excel professionally without compromising your personal life.

Professional Growth : Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere.

An international work environment with opportunities for professional growth and development.

A collaborative and inclusive culture that values diversity and innovation.

What you will do :

- Develop ASIC IP blocks and subsystems, contributing to the advancement of 5G and 6G communication technology.

- Take full ownership of a design, whether at the block or subsystem level.

- Generate comprehensive documentation throughout the design lifecycle.

- Perform digital design and conduct all RTL sign-off checks.

- Continuously enhance and optimize design methodologies and processes.

- Collaborate with IP Architects to break down requirements and create detailed IP architecture and design specifications.

- Work closely with verification engineers to review and refine verification plans.

- Build competence in the technical domain.

- Engage in cross-team collaboration to ensure successful project delivery.

You will bring :

Required Qualifications :

- Bachelors degree in electrical or computer engineering.

- 8+ years industry experience in ASIC IP Design

- Strong Experience in/with :

1. Understanding of ASIC technology, design environments, and methodologies.

2. IP development from concept (High-level Spec) to Micro-architecture, RTL creation and sign-off with SystemVerilog

3. RTL static sign-off tools such as SpyGlass

4. Understanding of Synthesis and Timing concepts.

5. Scripting languages like TCL, Python, or similar.

6. AMBA-based IP development using AXI and CHI.

7. SystemVerilog Assertions

Additional Requirements :

- Experience with Cadence and Synopsys front-end and middle-end design suites.

- Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment.

- High attention to detail and commitment to quality.

- Strong focus on meeting project deadlines and deliverables.

- Proficient in English, with strong communication skills.

Preferred Skills :

- Understanding of radio access systems and their components. Modelling in MATLAB is a plus.

- Expertise in low-power design, including specifying power intent using UPF or similar standards.

- Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysisenvironments (e.g., Simscope), issue-tracking (e.g., Jira).

Experience in designing IPs for one or more of the following hardware domains :

1. ARM-based embedded microcontroller systems including their control and interface peripherals(Ethernet, USB, CPRI).

2. Wireless infrastructure specific protocols and interfaces and protocols.

3. Implementation of hardware-based digital signal processing systems (filters, adaptation, knowledge of CFR, DPD, Digital up-conversion and down-conversion chains etc).