HamburgerMenu
hirist

DFT Engineer - SoC

Tech Grow Global
5 - 7 Years
Multiple Locations

Posted on: 14/05/2026

Job Description

Company Overview :

Tech Grow Global is a leading provider of cutting-edge VLSI design and verification services, empowering semiconductor companies to develop innovative and high-performance products. We operate across diverse industries, including mobile communications, automotive, and consumer electronics, enabling our clients to stay ahead in a rapidly evolving technological landscape. Our commitment to excellence and customer satisfaction has established us as a trusted partner for leading technology companies worldwide.

Role Overview :

As a DFT Engineer at Tech Grow Global, you will be responsible for the design, implementation, and verification of Design-for-Testability (DFT) features in complex SoCs.


You will collaborate closely with RTL designers, verification engineers, and physical design teams to ensure high test coverage and efficient test methodologies.


Your work will directly impact the quality and reliability of our client's products, contributing to their success in the market.

Key Responsibilities :

- Develop and implement DFT architectures, including scan insertion, ATPG, MBIST, and LBIST, to ensure high fault coverage for complex SoCs.

- Generate ATPG patterns and perform fault simulation to validate DFT implementation and identify potential testability issues.

- Collaborate with RTL designers to incorporate DFT requirements into the design flow and optimize for testability.

- Work with verification engineers to develop and execute DFT verification plans, ensuring the correctness and effectiveness of DFT features.

- Debug DFT-related failures and work with cross-functional teams to identify and resolve root causes.

- Develop and maintain DFT documentation, including specifications, test plans, and reports.

- Evaluate and implement new DFT methodologies and tools to improve test coverage and reduce test costs.

Required Skillset:

- Demonstrated ability to design and implement DFT architectures, including scan insertion, ATPG, MBIST, and LBIST.

- Proven expertise in generating ATPG patterns and performing fault simulation using industry-standard tools.

- Strong understanding of VLSI design principles and digital logic design.

- Proficiency in System Verilog and other hardware description languages.

- Experience with debugging DFT-related failures and working with cross-functional teams.

- Excellent communication and interpersonal skills, with the ability to collaborate effectively with diverse teams.

- Bachelor's or Master's degree in Electrical Engineering or a related field.

info-icon

Did you find something suspicious?

Similar jobs that you might be interested in

Loading chat...