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SwediumGlobal is seeking for Lead ASIC Verification Engineer Location : Lund, Sweden Job Description : Lead ASIC Verification Engineer Role : We are looking for an experienced verification engineer. What candidate will do : - Develop a comprehensive verification planning, including specifications. - Architect and enhance state-of-the-art verification environments. - Implement and maintain UVCs, ensuring every corner of the design is verified. - Drive both random and directed testing strategies to uncover hidden bugs. - Leverage advanced coverage techniques to ensure top-tier verification completeness. - Champion continuous improvement in product quality, efficiency, and workflows. Help in setting up Team Take Interviews and lead the team Qualification : - A Master's degree in Electrical Engineering, Computer Engineering, or a related field. - Expertise in ASIC or FPGA verification at IP, sub-system, and chip levels, using SystemVerilog UVM. Possibly 12 years of experience in Verification. - Hands On experience designing UVM test environments and driving coverage closure - An insatiable curiosity, ready to learn something new daily and apply it to make a real difference. - Creative problem-solving skills-you see challenges as opportunities for innovation. - A collaborative spirit and the ability to thrive independently, with exceptional communication skills. - A results-oriented mindset with a passion for continuous improvement, always seeking more innovative, faster solutions.

Overseas/International

Others

ASIC Verification Lead 

About Us : Swedium Global Services is the growing System Engineering and Solution Company, offers services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy and Outsourcing services to our clients across the globe for an onsite and offshore business model. Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India. Job Role : Senior ASIC Verification Engineer Job Description : - Take part of the verification of designs, whether at the block or subsystem level. - Participate in defining and implementing UVM-based test environments. - Support the creation of Verification Strategies and contribute to the development and execution of Verification Plans. - Develop, run, and debug test cases to ensure design quality under supervision. - Contribute to the improvement and optimization of verification methodologies. - Generate documentation throughout the verification lifecycle. - Collaborate closely with other verifiers, designers, and architects. - Build competence in the technical domain. - Engage in cross-team collaboration to ensure successful project delivery. Required Qualifications : - Bachelor s degree in electrical or computer engineering. - 7+ years industry experience in ASIC IP verification using System Verilog and UVM. - Strong experience in / with : 1. Development of verification test plans and create directed/randomized test cases. 2. Formal verification. - In implementing scoreboards, checkers, bus functional models in existing testbench environment. - Ethernet and PCIe experience - AMBA-based designs such as AXI and CHI. - SystemVerilog Assertions.

Remote

Bangalore

Anywhere in India/Multiple Locations

Senior ASIC Verification Engineer - UVM/System Verilog 

Description : Job Title : Senior Lead IP Verification Location : Onsite Malm- , Sweden Experience : 7+ Years Company : Swedium Global Services About Swedium Global : Swedium Global is a leading System Engineering and Solution Company headquartered in Stockholm, Sweden, delivering cutting-edge technology solutions to clients across Europe. The company provides specialized expertise through on-site consulting services and dedicated offshore development centers in Poland, the Czech Republic, India, and Sweden. Swedium Global partners with global organizations to enhance their technological capabilities, strengthen product innovation, and support end-to-end engineering needs with a commitment to excellence, quality, and long-term customer success. Role Overview : Swedium Global is seeking a highly skilled Senior Lead IP Verification for a full-time onsite position in Malm- , Sweden. The role involves leading verification activities for complex IP designs, defining and executing verification strategies, and ensuring alignment with functional specifications and project requirements. The ideal candidate will have strong hands-on experience in SystemVerilog/UVM-based verification, deep protocol knowledge, and prior exposure to complex SoC/IP environments. This position requires strong leadership capabilities, excellent communication skills, and the ability to guide teams while ensuring high-quality deliverables. Key Responsibilities : Verification Strategy & Planning : - Develop and drive comprehensive verification plans for complex IP blocks. - Define verification methodologies, coverage strategies, and validation metrics. - Review design specifications and map them into verification requirements. Testbench Development & Execution : - Architect and implement UVM-based testbenches for IP-level verification. - Develop test sequences, checkers, assertions, and functional coverage models. - Execute tests, collect coverage data, and ensure verification completeness. - Implement constrained-random and directed tests based on functionality needs. Debugging & Issue Resolution : - Analyze simulation failures, identify root causes, and drive fixes. - Work closely with RTL designers to resolve functional or timing issues. - Utilize EDA tools for waveform debugging, coverage analysis, and regression tracking. Automation & Scripting : - Develop automation scripts using Python, Perl, or Tcl to enhance regression efficiency. - Integrate test environments with CI/CD setups (if applicable). - Streamline workflows for execution, reporting, and coverage analysis. Team Leadership & Collaboration : - Lead and mentor a team of verification engineers, providing guidance on methodology, debugging, and best practices. - Coordinate verification schedules, tasks, and resource planning. - Collaborate with cross-functional teams including design, architecture, validation, and physical design to achieve project milestones. - Communicate progress, challenges, and risks to project stakeholders. Quality & Compliance : - Ensure verification processes adhere to internal quality standards and project guidelines. - Deliver high-quality documentation including test plans, coverage reports, results summaries, and sign-off documentation. Required Qualifications & Skills : Technical Skills : - Strong hands-on experience in functional verification, test planning, and debugging. - Expertise in SystemVerilog and UVM methodology. - Proficiency with EDA tools such as Synopsys VCS, Cadence Incisive/Xcelium, or similar. - Solid understanding of industry-standard protocols such as PCIe, Ethernet, USB, AMBA (AXI/AHB/APB), DDR, etc. - Strong experience working on complex SoC or IP verification environments. - Experience in writing automation scripts using Python, Perl, or Tcl. - Familiarity with coverage-driven verification, assertions, and constrained random testing. Leadership & Soft Skills : - Ability to lead verification teams, assign tasks, and manage verification schedules. - Experience mentoring junior engineers and fostering a collaborative team environment. - Strong analytical, debugging, and problem-solving skills. - Excellent communication and stakeholder management abilities. - Ability to manage multiple priorities and deliver within project timelines. Why Join Swedium Global? : - Opportunity to work in a highly innovative and international engineering environment. - Direct involvement in cutting-edge IP and SoC development projects. - Collaborative global culture with strong emphasis on quality and technology excellence. - Long-term onsite role in Sweden with exposure to European engineering practices.

Senior Lead - IP Verification 

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