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Gate Level Simulation Design Verification Engineer
Multiple Locations
HCL - Senior Functional Safety Architect - FPGA/SoC
Hyderabad/Chennai/Bangalore
Sykatiya Technologies - DFT Design Engineer - ATPG/MBIST
Bangalore/Hyderabad
Sykatiya Technologies - Verification Engineer - ASIC/UVM
VLSI Design Engineer
Bangalore
VLSI Verification Engineer
Senior DFT Engineer/Manager - VLSI
Lead DFT Engineer - SoC/VLSI
Principal Engineer/Senior Manager - Digital Design
Lead DFT Engineer - RTL/ATPG/SoC
Physical Design Lead - ASIC/VLSI
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