About the Role :

We are seeking a highly skilled Senior Design Verification Engineer with strong expertise in IP/block-level verification to join our hardware engineering team. The ideal candidate will be responsible for architecting, developing, and executing verification strategies for complex SoC/IP designs, ensuring high-quality deliverables and first-time-right silicon. This role requires hands-on experience with UVM-based verification environments, low power verification (UPF), and advanced debugging skills.

Key Responsibilities :

- End-to-End Verification Ownership : Lead verification of complex IP blocks from test plan creation through execution, coverage closure, and sign-off.

- Testbench Development : Architect and implement reusable UVM-based testbenches, including drivers, monitors, scoreboards, assertions, and checkers.

- Low Power Verification : Drive UPF-based verification flows, validate power intent, and ensure functional correctness in low-power modes.

- Simulation & Regression : Execute large-scale simulations, manage regressions, triage/debug failures, and provide timely fixes or workarounds.

- Protocol Verification : Validate high-speed protocols (PCIe/USB/CXL), ensuring compliance and robustness of the design.

- Coverage & Quality : Develop and track functional and code coverage metrics, driving closure against project goals.

- Collaboration : Work closely with design, architecture, and validation teams to ensure seamless integration and early bug detection.

- Process & Best Practices : Contribute to methodology improvements, automation, and scalable verification frameworks.

Requirements :

Education : B.E/B.Tech or M.E/M.Tech in Computer Engineering.

Experience : 5- 10 years of experience in ASIC/SoC design verification with proven end-to-end ownership of IP/block verification.

Technical Skills :

- Strong expertise in SystemVerilog, UVM methodology, assertions, and checkers.

- Hands-on with low power verification flows (UPF/CPF).

- Deep understanding of clocking, reset, and boot flows.

- Strong debugging skills across simulation and emulation environments.

- Familiarity with PCIe, USB, or CXL protocols (preferred).

Soft Skills : Strong analytical thinking, problem-solving ability, communication skills, and ability to work in cross-functional teams.