A VLSI Chip Design Engineer job description includes designing digital or analog circuits using Hardware Description Languages (HDLs) like Verilog or VHDL, optimizing designs for performance, power, and area (PPA), and collaborating with verification, layout, and fabrication teams.

Key responsibilities :

- Involve using Electronic Design Automation (EDA) tools such as Cadence or Synopsys, performing simulations, and troubleshooting designs.

- The role requires a strong understanding of digital electronics, CMOS fundamentals, and a Bachelor's or Master's degree in a relevant engineering field.

Key responsibilities :

- Circuit Design: Create and modify integrated circuit (IC) designs using HDLs like Verilog, VHDL, or SystemVerilog for specific functionalities.

- PPA Optimization: Optimize designs to meet performance, power, and area (PPA) targets.

- Simulation and Verification: Run and debug simulations to verify the design's functionality and performance against specifications.

- Collaboration: Work closely with other teams, including verification engineers, physical design engineers, and fabrication teams, to ensure a manufacturable and functional chip.

- Tool Proficiency: Utilize industry-standard EDA tools for design, synthesis, and analysis (e.g., Cadence, Synopsys, Mentor Graphics).

- Troubleshooting: Analyze and resolve complex design and silicon-related issues.

- Documentation: Document design processes, specifications, and results.

Required qualifications :

- Education: Bachelor's or Master's degree in VLSI, Electronics, or a related field.

Technical Skills :

- Strong knowledge of digital electronics, CMOS fundamentals, and VLSI principles.

- Proficiency in at least one HDL (Verilog, VHDL, or SystemVerilog).

- Familiarity with C/C++ or Python scripting is often beneficial.

- Experience with EDA tools for simulation, synthesis, and layout is required.

- Experience: 1 to 2 years of industry experience.

- Soft Skills: Strong problem-solving, analytical, and communication skills (both written and verbal) are

essential.