Tessolve - DFT Engineer - SoC/MBIST

Description :

Position : DFT Engineers. Experience : 5+ relevant experience.. Location India.

Role Overview :

We are looking for highly motivated, energetic, and team-oriented DFT Engineers who can take on the challenge of delivering complex IPs using advanced Design-for-Test methodologies and tools.

Key Responsibilities :

- Develop, implement, and validate DFT architectures for complex IP and SoC designs.

- Perform Scan insertion, ATPG pattern generation, MBIST insertion, and related simulations.

- Ensure DFT coverage, identify gaps, and improve testability strategies.

- Work closely with design, verification, and physical design teams to ensure seamless integration of DFT features.

- Debug simulation issues and collaborate with cross-functional teams to resolve design and test-related problems.

- Support STS/GLS simulations and ensure compliance with DFT requirements.

- Generate and maintain technical documentation including Architecture Specifications, DFT Plans, and SoC Integration Specifications.

- Collaborate with tool vendors and internal teams to optimize flows using Synopsys/Cadence/Mentor toolsets.

- Contribute to automation through scripting (Perl/Python/Shell/TCL) to improve efficiency and turnaround time.

Technical Skillset Required :

- Strong knowledge and hands-on experience in DFT methodologies.

- Solid understanding of DFT architecture, Scan, ATPG, Simulation, and GLS.

- Experience with tools from Synopsys, Cadence, or Mentor (Tetramax, Modus, Tessent, DC tools).

- Hands-on experience in ATPG, Scan, and MBIST insertion and simulation.

- Exposure to JTAG is an added advantage.

- Strong debugging skills in simulation environments.

- Experience preparing technical documentation (Architecture Spec, Integration Spec).

- Proficiency in scripting : Perl, Python, Shell, or TCL.