Were looking for Physical Design Specialist (PDS) to join the team.

Does this sound like a good role for you?

In this role you would be :

- The primary focus of the Physical Design Specialist (PDS) is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in the cost, quality, and development time for projects.

- PDS are expected to possess Place & Route (physical) , Synthesis (logical and physical), STA experience and knowledge.

- PDS AEs are expected to be knowledgeable in multiple domains of design implementation and understand codependency of flow and methodology such as Macro & Standard Cell Placement, Clock Tree Synthesis, Routing, Advanced Timing Optimization techniques.

- Additional knowledge of AI driven Methodologies, RTL Coding, Synthesis, Equivalency check, Constraints (timing & Power Signoff) is preferable.

- In addition, PDS AEs will articulate design methodologies involving Synopsys tools at a very advanced Node (Sub 5nm) using Synopsys Full RTL-to-GDSII solution (Fusion Compiler / IC Compiler II/ICC2).

- Development time will be spent gaining expertise in additional, or specialization tools, broadening focus from product emphasis to methodology, sharpening Account Management skills, and learning to leverage success.

- PDS AEs are expected to manage multiple customer activities concurrently, and work with Account Managers and AC management to set their priorities.

- Sales support roles include product demonstrations, evaluations, and competitive benchmarking.

- Customer support roles include training, problem resolution, and technical account management.

- PDS AEs must be able to interact effectively with end-users at customer sites, as well as first level managers.

- PDS AEs also participate in account planning, where they work as part of the account team to develop the Synopsys solution to customer problems by bringing their understanding of customers' needs and issues.

Key Qualifications :

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- Design Implementation experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing).

- RTL to GDSII full flow experience or knowledge is preferable.

- Strong interest and understanding of Advanced Node & Design methodologies are required.

- In-depth Synopsys Back end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced Node , Static Timing Analysis, including noise analysis) experience and knowledge are required.

- Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred.

- Excellent verbal and written presentation/communication skills are mandatory.

- Customer sensitivity, the ability to multiplex many issues & set priorities, and the desire to help customers exploit new technologies are essential for success in the position.

Preferred Experience :

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- BSEE or equivalent, required with 7+ years of experience, or MSEE, or equivalent with 5+ years of experience.

- Tool knowledge expected : Back end P&R tools (Fusion Compiler, ICC2, Innovus).

- Tool knowledge (preferred) : front end Synthesis tools (Fusion Compiler, Design Compiler, Genus).

- Tool knowledge (preferred) : STA (Primetime, Tempus).

The Team Youll Be A Part Of :

- Youll join a high-performing Customer Application Services team focused on delivering world-class technical solutions and support to leading semiconductor companies.

- Our team collaborates closely with R&D, sales, and product groups to ensure that Synopsys customers achieve their design goals efficiently and effectively.

- We foster a culture of innovation, continuous learning, and mutual respect, where every members expertise is valued and every voice is heard.

Rewards and Benefits :

- We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

- Our total rewards include both monetary and non-monetary offerings.

- Your recruiter will provide more details about the salary range and benefits during the hiring process.