Swedium Global - Senior ASIC Verification Engineer - Specman/UVM

Company Overview :

Swedium Global is a fast-growing System Engineering and Solutions Company delivering high-quality technology services to clients worldwide. Our expertise spans Semiconductor Engineering R&D, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, as well as Consultancy and Outsourcing Solutions.

With a global presence across Sweden, Finland, Poland, Czech Republic, and India, we support customers through both onsite and offshore delivery models, helping them accelerate innovation and bring next-generation products to market.

Position : Senior ASIC Verification Engineer

Location : Finland

Expected Start Date : ASAP

Job Description :

We are seeking a highly skilled Senior ASIC Verification Engineer with extensive hands-on experience in Specman e and UVM methodologies. In this role, you will lead block-level and SoC-level verification activities for complex ASIC/IC designs, ensuring robust functionality and high-quality silicon delivery.

Roles and Responsibilities :

As a Senior ASIC Verifier, you will :

- Lead and execute block-level and SoC-level verification for advanced ASIC/IC projects.

- Develop, enhance, and maintain verification environments using Specman e and UVM.

- Define and implement verification strategies, test plans, coverage metrics, and functional scenarios.

- Collaborate closely with design teams to understand specifications, identify corner cases, and ensure feature completeness.

- Debug complex issues at both RTL and system levels using advanced debugging tools and methodologies.

- Perform functional coverage analysis, close coverage goals, and ensure compliance with project requirements.

- Participate in reviews for architecture, specifications, and verification deliverables.

- Mentor junior team members, contribute to best practices, and support process improvements within the verification domain.

Qualifications :

- 7+ years of industry experience in ASIC/IC verification.

- Strong proficiency in Specman e and/or SystemVerilog (UVM).

- Deep understanding of verification methodologies, functional coverage, constrained-random testing, and debugging techniques.

- Solid knowledge of ASIC design flow, digital design concepts, and SoC integration.

- Proven experience working on medium to large-scale verification projects.

- Strong analytical, problem-solving, and communication skills.

- Fluent in English, both written and verbal.