- Verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/DDRx/LPDDRx/AI accelerator integration verification in SoC RTL.

- Your key responsibilities will include writing test plans, defining test methodologies, developing C-based software tests, SystemVerilog/Verilog testbenches and tests, and debugging test failures and issues.

- Working with project management and leads on planning tasks, schedules, and reporting progress.

- Collaborate with engineers from other teams, including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development.

Requirements :

- Proven understanding of digital hardware verification language Verilog/Systemverilog HDL.

- Experience in SoC verification using Embedded Low-level programming, including C/C++ tests and assembly language(preferably Arm).

- Experienced in SoC verification using.

- Experienced in one or more of various verification methodologies - UVM/OVM, formal, power-aware verification, emulation.

- Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support.

- Good problem-solving and Debugging skills.

- Knowledge of SoC Verification Flow and strategy.

- Experience with Arm-based designs and/or Arm System Architectures, SoC Boot flow, Cache coherency.

- Porting peripheral driver software for SoC tests.

- Clock Domain Crossing verification.

- Experienced in GLS, DFT/DFD.

- Experienced in UPF Power Aware verification.

- Automation experience with shell programming/scripting (e. g., Tcl, Perl, Python, etc. )