Description :

We are looking for an experienced Emulation development Engineer who can build, debug, and deploy high-performance silicon emulation models and hybrid (virtual + emulator) platforms .

Key Responsibilities :

- Develop, bring-up, and maintain transactor-based and synthesizable emulation models for complex SoCs (multi-core CPU/GPU/NPU, high-speed interfaces, DDR/HBM, PCIe/CXL, Ethernet, etc.)

- Build and debug Palladium and ZeBu bring-up environments from RTL to emulation-ready models

- Create hybrid emulation environments (virtual platform + emulator) using Synopsys VE, Cadence Prototype Link, Mentor Virtual Device, or similar

- Develop and integrate C/C++/SystemC transactors, TLM models, and co-emulation interfaces

- Work closely with RTL design, verification, and software teams for early firmware/driver bring-up on emulators

- Optimize synthesis, compile time, and run-time performance of emulation builds

- Drive debug of hardware-software issues using emulation waveforms and force-release techniques

- Automate emulation flow (build, regression, coverage) using Python/Tcl/Perl/Make

Required Skills & Experience :

- 615 years of hands-on experience in building silicon emulation models.

- Expert-level experience with at least two of the following platforms : Synopsys ZeBu and Cadence Palladium XP/GX / Protium.