Description :

SiMa.ai is scaling Physical AI in Robotics, Automotive, Industrial, Aerospace and Defense, and Medical markets. We have created the industry's best purpose-built, software centric Physical AI HW/SW platform that leads the industry in Ease of use, performance, and power efficiency. SiMa.ai is led by technologists and business veterans backed by a set of top investors committed to helping customers bring ML on their platforms. SiMa.ai was founded in 2018, has raised $355M and is backed by Fidelity Management & Research Company, Maverick Capital, Point72, MSD Partners, VentureTech Alliance and more.

Job Title : Director, HW Design

Job Location : Bangalore, India (This position requires a full-time, on-site presence in our Bangalore, India Office)

Job Description :

We are seeking a Design Team Manager to lead our SoC design team in Bangalore. This is a hands-on leadership role responsible for managing and scaling a team of front-end SoC design engineers, driving execution across multiple projects, and collaborating with cross-functional teams across architecture, verification, physical design, firmware, and software.

You will play a pivotal role in defining, implementing, and delivering SiMa.ais next-generation MLSoC designs.

Areas of Focus :

- Lead a high-performing team of SoC design engineers in areas such as RTL design, integration, and logic implementation.

- Drive SoC and subsystem-level design and integration from concept to tape-out.

- Collaborate closely with Architecture, Verification, Physical Design, and Firmware teams to deliver high-quality silicon.

- Manage project planning, task allocation, and execution tracking to meet aggressive schedules.

- Recruit, mentor, and develop engineering talent within the team.

- Contribute to and enforce best practices in RTL development, verification-readiness, and documentation.

- Participate in design and architecture reviews to ensure scalability, performance, and power-efficiency goals are met.

- Coordinate with global teams across multiple locations for design convergence and alignment.

Requirements :

- Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.

- 15+ years of experience in SoC or ASIC design, with at least 8+ years of experience in a technical leadership or management role.

- Proven expertise in front-end RTL design using Verilog/SystemVerilog.

- Experience with SoC integration, bus protocols (AXI/AHB), clock/power/reset domains, and IP integration.

- Familiarity with synthesis, static timing analysis, and design constraints.

- Strong understanding of the full silicon development cycle, from spec to tape-out.

- Excellent communication and team leadership skills.

- Experience working with geographically distributed teams.

- Experience with ML/AI accelerators, embedded CPUs (e.g., ARM), and low-power design techniques is a plus.

Personal attributes :

- Can-do attitude.