Posted on: 02/12/2025
Job Overview :
We are seeking an experienced Senior Mixed-Signal Verification Engineer with a strong background in behavioural modelling and high-speed Analog design. The ideal candidate will play a key role in developing, verifying, and validating complex mixed-signal systems using digital verification methodologies and tools.
Required Skills :
- 10+ years of relevant industry experience in mixed-signal or Analog/digital verification.
- Proven experience in Behavioural Modelling (BM) of Analog designs for digital verification.
- Strong understanding of mixed-signal dynamic verification using digital design tools (no AMS simulators).
- Hands-on experience with Verilog/System-Verilog coding and testbench development.
- Proficiency with Cadence Virtuoso schematic and simulation tools.
- Solid foundation in Analog circuit design principles.
- Experience with UVM
- Familiarity with both Synopsys and Cadence verification environments.
- Exposure to high-speed Analog design, such as SerDes, PLLs, or data converters (optional but valuable).
Additional Skills :
- Verification Methodologies & Tools : Deep understanding of modern verification flows, including simulators, waveform viewers, automation frameworks, and coverage-driven verification. Proven ability to develop scalable, reusable, and portable test environments.
- Collaboration & Teamwork : Demonstrated ability to verify Analog and mixed-signal designs collaboratively within multi-disciplinary teams.
- Communication : Strong written and verbal communication skills. Able to write clear test plans, document verification results, and present findings effectively to cross-functional teams.
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Posted By
Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1583763
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