Senior EDA CAD Engineer - ASIC/VLSI Tools

Location : Bangalore (On-site)

Important Note

This is an ASIC/VLSI EDA CAD role.

Mechanical CAD (AutoCAD, SolidWorks, CATIA, etc.) Profiles are NOT relevant for this position.

Role Overview :

Aeva is looking for an experienced EDA/CAD Engineer to deploy, support, and automate front-end ASIC/VLSI EDA tools for large-scale silicon programs. The role involves close collaboration with design, implementation, and verification teams to improve productivity, automation, and flow efficiency across global teams.

Key Responsibilities :

- Deploy and support front-end EDA tools such as RTL simulators, low-power analysis tools, Lint, CDC/RDC/SDC/DFT, and formal verification tools.

- Develop and maintain automation scripts using Python, Bash, Tcl, C, and Makefiles for regression, debug, and CI/CD flows.

- Integrate EDA tools with compute farms / load distribution systems (LSF or similar).

- Streamline ASIC design flows and improve productivity through design automation.

- Configure and maintain dashboards for project progress and tool usage.

- Work closely with EDA vendors for tool installation, configuration, and license management.

- Support global teams by deploying standardized CAD tools and methodologies across geographies.

Must-Have Qualifications :

- 10+ years of experience in EDA CAD / ASIC / VLSI design automation.

- 4+ years supporting large-scale 100M+ gate ASIC projects.

- Strong understanding of ASIC front-end design flows.

- Strong scripting and programming skills in Python, Bash, Tcl, C, Makefiles.

- Solid experience in Linux system administration (RHEL preferred).

- Experience with version control systems (Git / Perforce / Mercurial).

Nice-to-Have Skills :

- Experience with LSF, Kubernetes, or compute farm management.

- Knowledge of System Verilog / Verilog and hardware design flows.

- Experience building web-based dashboards (JavaScript, CSS).

Why Join Aeva :

- Aeva is transforming autonomy with next-generation sensing and perception technology.