Posted on: 11/11/2025
Job Description :
- In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. :
1. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.
2. Floor Planning/Innovus/Fusion Compiler Experience on programming in Tcl/Tk/Perl.
- Physical Design Methodologies and submicron technology of 28nm and lower technology nodes.
- Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes.
- Should have experience on programming in Tcl/Tk/Perl.
- Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre).
- Well versed with timing constraints, STA and timing closure.
- Should have experience on Physical Design Methodologies and submicron technology of 28nm and lower technology nodes.
- Should have experience on programming in Tcl/Tk/Perl - Well versed with timing constraints, STA and timing closure.
Did you find something suspicious?
Posted By
Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1572834
Interview Questions for you
View All