Memory Layout Engineer

Job Summary :

Key Responsibilities :

- Collaborate with hardware architects, SoC designers, and firmware engineers to ensure seamless integration of memory subsystems.

- Develop memory maps and detailed documentation for memory allocation, addressing, and access protocols.

- Analyze memory requirements and constraints to maximize performance and minimize latency and power consumption.

- Perform simulations and modeling to validate memory designs and layouts.

- Identify and troubleshoot memory-related issues during hardware development and testing phases.

- Stay updated with the latest trends and technologies in memory design and optimization.

- Provide technical support and guidance to other engineering teams related to memory architecture and layout.

- Participate in design reviews and contribute to continuous improvement of design processes and methodologies.

Qualifications :

- Proven experience 4-8 years in memory design, layout, or architecture, preferably in semiconductor or embedded system environments.

- Strong understanding of memory technologies (e.g., DRAM, SRAM, Flash) and their characteristics.

- Proficiency with hardware description languages (HDLs) such as Verilog or VHDL is a plus.

- Experience with memory simulation tools and layout software.

- Knowledge of low-level programming and firmware development is beneficial.

- Excellent problem-solving skills and attention to detail.

- Strong communication and teamwork abilities.

Preferred Skills :

- Familiarity with power optimization techniques in memory design.

- Understanding of operating system memory management concepts.

- Experience with scripting languages (Python, TCL) for automation.