Posted on: 23/09/2025
Job Description :
Responsibilities :
- Work closely with the design, design-verification, and backend teams to enable the integration and validation of the test logic in all phases of the design, and backend implementation flow.
- The job requires the candidate to have good scripting skills and the ability to design and debug with minimal oversight.
- Involve in high quality pattern release to test team and support silicon bring-up and yield improvement.
Requirement :
ASIC Design DFT engineer with related work experience with a broad mix of technologies including :
- Knowledge of the latest state of the art trends in Memory testing and silicon engineering
- Hands on experience in MBIST, JTAG & IJTAG protocols, and scan architectures.
- Verification skills including System Verilog, LEC and validating test timing of the design.
- Experience working with gate-level simulations, and debug with VCS and other simulators.
- Understanding the testbench in System Verilog, UVM/VMM is a plus.
- Post-silicon validation and debug experience, ability to work with ATE patterns.
- Strong verbal communication skills and ability to thrive in a dynamic environment.
- Scripting skills : Python/Perl
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Posted By
Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1551067
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