Lead Engineer - ASIC/Physical Design

Description :

- Expertise in ASIC PD

- Expertise in digital physical design

- Expertise in working with 3nm & 5nm technology nodes

- Expertise in EDA synthesis, APR, STA tools and methodologies

- Expertise in one or more of the following tools ICC, ICC2, Innovus, Olympus

- Working knowledge of one or more of the following tools Primetime, Calibre, and Red hawk

- Expertise in working with multi modes and multi corners STA

- Working Knowledge of multiple power planes and multiple VT libraries

- Basic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence Verification

- Good at scripting languages PERL, TCL, shell

- Worked on at least 2 tape ins of moderate to high speed designs with multiple power planes

- Debug, fix, and validate pre- and post-silicon IP/sub-system logic issues and bugs

- Expertise in one or more of the following circuit design fields is an advantage: clock tree optimization, Timing analysis, and Power optimization

- Expertise in making ECOs both Metal and logic level ecos

- Expertise in DRC and LVS cleanup of designs during sign off

- Expertise managing global teams would be an added advantage