Lead Emulation Engineer - RTL/SoC

Technical Expertise :

- Good understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs.

- Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog

-Experience in building emulation model builds from scratch for SoC components

- Familiarity with emulation platforms and tools (e.g., Cadence Palladium, Mentor Graphics, Synopsys ZeBu). including model compilation, test execution, and debugging

- Experience in Transactor/AVIP Integration and basic sanity

- Experience in writing sanity testcases for Transactors (using SCEMI/DPI) or porting verification testcases to making emulation compatible

- Familiarity with Emulation runtime flows and debugging techniques

- Experience in setting up and configuring emulation environments.

- Ability to manage emulation servers, clusters, and resources effectively.

- Ability to develop and execute verification plans specific to emulation environments

- Protocol knowledge of peripherals is a plus: Proficient in Arm CPU cores and PCIe Gen4/5, JTAG, SPI, UART, I2C, USB2.0, USB3.0, Display Port, HDMI, Ethernet 1G/2,5G/5G/10G.

- Scripting and Automation

- Proficiency in scripting languages Unix, Python, Perl, Tcl for automation of emulation tasks, test case generation, and results analysis.

- Experience in developing automated flows for regression testing and continuous integration (CI) pipelines.