Description :

We are seeking an experienced IP Verification Engineer to join our dynamic team in India. The ideal candidate will have a strong background in digital design and verification, with a proven track record of validating complex IP designs. You will be responsible for developing test plans, executing verification strategies, and ensuring the highest quality of our IP products.

Responsibilities :

- Develop and execute test plans for IP verification

- Create and maintain verification environments using SystemVerilog and UVM

- Collaborate with design engineers to understand design specifications

- Identify and debug issues in the IP designs

- Perform coverage analysis and ensure quality metrics are met

- Document verification results and prepare reports for stakeholders

- Participate in design reviews and provide feedback from a verification perspective

Skills and Qualifications :

- Bachelor's or Master's degree in Electronics, Computer Engineering, or related field

- 4-6 years of experience in IP verification

- Strong knowledge of digital design concepts and verification methodologies

- Proficiency in SystemVerilog and UVM (Universal Verification Methodology)

- Experience with verification tools such as ModelSim, VCS, or QuestaSim

- Familiarity with scripting languages like Python or Perl

- Good understanding of RTL design and synthesis tools

- Excellent problem-solving skills and attention to detail