FPGA Design Engineer - Verilog/VHDL

Description :

We are seeking a highly skilled FPGA Design Engineer with strong expertise in digital design, high-speed data processing, and RTL development for networking and data center applications. The ideal candidate will have in-depth experience with FPGA architecture, advanced design techniques, and verification methodologies. This role involves working on high-performance FPGA-based solutions, optimizing data paths, and ensuring reliable and efficient design implementation.

Key Responsibilities :

- Develop and implement FPGA designs using Verilog/VHDL, adhering to best practices in coding, modularity, and reuse.

- Apply advanced FPGA design techniques such as pipelining, parallelism, data path optimization, and memory management.

- Translate architectural requirements into optimized and synthesizable RTL logic.

High-Speed Digital & System Architecture :

- Work closely with hardware and system architects to ensure seamless integration of FPGA modules into larger systems.

Network & Data Center Technologies :

- Work with networking concepts and protocols such as Ethernet, MPLS, QoS, and related packet processing techniques.

- Implement FPGA logic tailored for data center switching, routing, and traffic management.

Synthesis, P&R, and Timing Closure :

- Ensure stable timing closure for designs operating at 200 MHz or higher.

- Optimize resource usage, performance, and power for FPGA implementations.

Simulation, Verification & Debugging :

- Develop testbenches, debug complex RTL issues, and ensure coverage-driven verification standards.

- Validate FPGA designs on hardware using logic analyzers, oscilloscopes, or embedded debug cores.

Documentation & Collaboration :

- Collaborate with cross-functional teams including software, hardware, and network engineering.

- Participate in design reviews and provide technical insights to improve design quality and efficiency.

Required Skills & Qualifications :

- Experience with advanced FPGA design techniques including pipelining, data path optimization, and memory hierarchy management.

- Familiarity with network protocols (Ethernet, MPLS, QoS) and data center switching concepts.

- Solid knowledge of computer architecture and high-speed digital design principles.

- Hands-on experience with synthesis and P&R tools such as Xilinx Vivado, Intel Quartus, operating at performance levels around 200 MHz.

- Proficiency with verification and simulation tools such as ModelSim or Questa.

- Strong debugging, analytical, and problem-solving skills.

Preferred Qualifications :

- Knowledge of hardware-software co-design and embedded systems.

- Exposure to FPGA prototyping and lab bring-up.

- Prior experience in data-center networking, switching ASIC/FPGA projects, or telecom domain.