- Candidate must have experience in Pre-Silicon Validation, Emulation/FPGA based platforms

- Experience in developing C/C++/SystemC tests in HDL-HVL Co-emulation platforms

- Experience in IO bus protocols such as I2C, SPI, USB, and/or PCIe

- Experience in debugging tools for systems-on-chip (SoCs) - eg. JTAG, Trace32

"Nice To Have" Skills and Experience :

- Knowledge of ASIC design flow, ASIC prototyping flow, and similar

- Knowledge of SystemC/C/C++ and UVM/SV verification languages

- Experience in these domains: PCIe, Flash, Memory, CPU, GPU, DRAM

- Experience with Emulation Tool Chains: Zebu, Veloce, Palladium.

Roles & Responsibilities:

- Develop and execute validation plans for pre-silicon environments using emulation and FPGA-based platforms.

- Design, develop, and maintain test cases in C/C++/SystemC for HDL-HVL co-emulation frameworks.

- Validate and verify SoC functionality by creating robust test scenarios across different subsystems.

- Work on debugging and root cause analysis using industry-standard tools such as JTAG and Trace32.

- Develop and validate test suites for various IO bus protocols including I2C, SPI, USB, and PCIe.

- Collaborate with design, verification, and firmware teams to ensure functional correctness and performance of SoC designs.

- Analyze test results, identify issues, and provide detailed debug reports with actionable insights.

- Contribute to the bring-up and validation of ASIC prototypes and emulation platforms.

- Support integration and validation of key subsystems such as CPU, GPU, Memory, DRAM, Flash, and PCIe interfaces.

- Work with emulation tool chains like Zebu, Veloce, and Palladium for large-scale SoC validation.

- Participate in improving validation methodologies, automation frameworks, and regression environments.

- Ensure compliance with verification plans and contribute to coverage closure activities.

- Stay aligned with ASIC design and prototyping flows to enhance validation efficiency and quality.