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DFT Engineer - SoC Design

TEKsystems Global Services Private Limited
8 - 12 Years
Bangalore

Posted on: 07/04/2026

Job Description

Description :



Role Overview :



We are looking for a DFT Engineer to work on complex SoC designs for automotive, industrial, and secure embedded applications. The role involves defining, implementing, and validating Design for Test architectures to achieve high test coverage, quality, and manufacturability while meeting stringent automotive and reliability requirements.



Key Responsibilities :



- Define and implement DFT architecture for IPs and full chip SoCs


- Perform scan insertion, scan compression, and scan chain validation


- Develop and support ATPG flows for stuck at, transition, and at's peed testing


- Implement and debug MBIST, LBIST, and memory test architectures


- Integrate and validate JTAG / Boundary Scan (IEEE 1149.x)


- Generate, simulate, and analyze ATPG patterns and fault coverage reports


- Debug DFT issues across RTL, synthesis, and gate?level simulations


- Collaborate with design, verification, physical design, and test engineering teams


- Support silicon brings?up, test failure analysis, and yield improvement


- Ensure alignment to automotive quality and safety requirements.



Required Qualifications :



- Bachelors or masters degree in Electronics / Electrical / VLSI Engineering


- 3+ years of hands on experience in SoC/IP/level DFT implementation

Strong understanding of :

- Scan design and compression

- ATPG fundamentals and fault models

- MBIST / LBIST concepts

Experience with industry standard DFT tools, such as :

- Synopsys DFT Compiler, TetraMAX

- Siemens Tessent


- Proficiency in Verilog/System Verilog


- Experience with gate level simulation and debugging


- Strong analytical and problem solving skills.



Preferred Skills/Nice to Have :



- Experience with automotive SoCs and safety critical designs


- Knowledge of ISO 26262, AEC Q100 (awareness level acceptable)


- Experience with hierarchical DFT and reusable IP flows


- Exposure to power aware DFT / ATPG


- Post's ilicon debug and tester pattern correlation experience


- Scripting knowledge (TCL, Perl, Python)



Benefits :



- Opportunity to work on industry leading and secure SoCs


- Exposure to advanced process nodes and large scale SoCs


- Collaborative, engineering?driven culture


- Strong career growth and global learning opportunities


- Competitive compensation and comprehensive benefits


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