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hirist

DFT Design Lead

First Career Center
7 - 17 Years
Anywhere in India/Multiple Locations

Posted on: 05/06/2026

Job Description

Job Summary:

We are looking for an experienced DFT (Design for Testability) Design Lead to drive DFT implementation, verification, and test architecture activities for advanced SoC/ASIC designs. The ideal candidate should have strong expertise in Scan, ATPG, MBIST, JTAG, compression techniques, and DFT methodologies, along with proven team leadership experience.

Key Responsibilities:

- Lead DFT architecture definition, implementation, and verification for complex SoC/ASIC designs.

- Develop and integrate DFT features including Scan, ATPG, MBIST, JTAG, and compression logic.

- Execute scan insertion, test pattern generation, and fault coverage analysis.

- Perform DFT verification, debugging, and sign-off activities.

- Analyze and resolve DFT-related issues during design, synthesis, and silicon bring-up phases.

- Work closely with RTL, Physical Design, Verification, and Validation teams.

- Ensure high test coverage while meeting design, area, timing, and power constraints.

- Review DFT deliverables and provide technical guidance to team members.

- Drive project planning, task allocation, and technical mentoring of engineers.

- Collaborate with cross-functional teams and stakeholders to ensure successful project execution.

Required Skills:

Technical Skills:

- Strong experience in DFT implementation and verification.

- Hands-on expertise in:

1. Scan Insertion

2. ATPG (Automatic Test Pattern Generation)

3. MBIST (Memory Built-In Self-Test)

4. JTAG

5. Scan Compression Techniques

- Good understanding of DFT architecture, methodologies, and debug flows.

- Experience in fault modeling, coverage analysis, and test optimization.

- Strong knowledge of SoC/ASIC design flow and semiconductor development lifecycle.

- Experience with industry-standard DFT EDA tools.

Preferred Skills:

- Hands-on experience with Tessent DFT Tool Suite.

- Knowledge of boundary scan, LBIST, and advanced DFT methodologies.

- Familiarity with Verilog/SystemVerilog and scripting languages such as Tcl, Perl, or Python.

Leadership Requirements:

- Proven experience in leading and mentoring DFT teams.

- Ability to manage project deliverables, schedules, and technical reviews.

- Strong stakeholder management and cross-functional coordination skills.

- Excellent problem-solving and decision-making abilities.

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