Design Verification Engineer - System Verilog

We are hiring a Design Verification Engineer for a leading semiconductor company in Bangalore and Pune. If you have a passion for verifying complex SoCs and working on cutting-edge ARM-based architectures, we want to hear from you!

Key Responsibilities :

- Perform Design Verification at SoC and Subsystem level, focusing on ARM-based SoCs (Cortex A/M series).

- Work on multi-processor ARM CPU-based architectures.

- Handle CoreSight debug infrastructure implementation/validation.

- Debug AXI/AHB/APB interfaces, memory subsystems, and Network-on-Chip (NoC) components.

- Contribute to testbench/checker/scoreboard development using SystemVerilog and UVM.

- Perform regression handling and debugging for RTL/GLS simulations.

- Collaborate on Memory Subsystem verification : LPDDR4/5, DDR, HBM.

- Participate in PCIe/CXL or similar complex protocol verification (e.g., Ethernet).

- Write and maintain automation scripts (Python/Perl) for simulation and workflow optimization.

Skills Required :

- Strong expertise in ARM-based SoC verification Cortex-A/M series

- Deep understanding of AMBA protocols (AXI/AHB), NoC components, and CHI/ACE (plus)

- Proficient in SystemVerilog, UVM, and C/C++ modeling

- Solid experience with debugging tools and simulation-based validation

- Memory protocols (LPDDR, DDR, HBM) a strong advantage

- PCIe, CXL, Ethernet or similar protocols plus

- Experience with scripting in Python, Perl is a value add

Nice to Have :

- Experience in GLS (Gate-Level Simulation)

- Prior work on Coresight-based debug validation

- Exposure to complex verification environments and regression management