Capgemini - DFT Engineer

Location : Mumbai, Pune, Hyderabad, Chennai, Noida, Gurgaon, Bangalore, Gandhinagar

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the worlds most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.

Job Description :

- Will be responsible for Designing and Implementing DFT techniques.

- Should hava a good understanding of Memory BIST/Scan /OnChip Compression/At-speed Scan/Test-clocking/Boundary

Scan/Analog Testing/Pin-muxing/LogicBIST on complex SOCs to improve testability.

- Test Modes implementation and verification, scan insertion including on-chip compression.

- Implementing, integrating and verifying memory BIST and boundary scan.

- ATPG Test vector (Stuck-at/At-speed/Path delay/SDD/IDDQ/Bridging fault) generation with high test Coverage and simulations at

gate level with timing (SDF).

- Basic understanding of complete SOC design and flow.

- Cross functional teams interaction for issue resolution.

- Participate in driving new DFT methodology and solutions to improve quality, reliability and in system test and debug capability.

- Hiring candidate with these specific personal characteristic and qualifications.

- Mentoring junior engineers and drive innovation/automation.

- Excellent in problem solving and analytical skills.

- Excellent communication, team work and networking skills.

Primary Skills :

- Should Have Good understanding of Design and DFT Architecture.

- Well Versed with ATPG Tools & MBIST Tools.

Secondary Skills :

- Team Player, Strong Business Acumen with understanding of organizational issues (conflict resolution between stakeholders).