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Job Description

Analog Layout Engineer

Location : Mumbai, Pune, Hyderabad, Chennai, Noida, Gurgaon, Bangalore, Gandhinagar


At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the worlds most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries.


Join us for a career full of opportunities. Where you can make a difference. Where no two days are?the same.


Job Description :


- To work independently on block/IP levels analog layout design from schematic.

- Estimating the Area, Optimizing Floorplan, Routing and Verifications.

- Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below.

- Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts.

- Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally.


Key Responsibilities :


- Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimization, routing, and layout verification.


- Perform LVS (Layout vs. Schematic) and DRC (Design Rule Check) debugging for advanced FinFET technology nodes (5nm, 7nm, 10nm, 14nm and below).

- Ensure layout quality by applying principles of matching, electromigration (EM), electrostatic discharge (ESD), latch-up prevention, shielding, parasitic management, and short channel effects.

- Utilize industry-standard EDA tools such as Cadence Virtuoso Editor and Calibre RVE for layout and verification tasks.


Primary Skills :


- Analog Layout Design (Block/IP level)

- LVS/DRC Debugging

- FinFET Technology Node Experience (5nm, 7nm, 10nm, 14nm and below)

- EDA Tools

- Cadence Virtuoso Editor

- Calibre RVE

- Layout Optimization

- Area estimation

- Floorplanning

- Routing


Secondary Skills :


- These support the primary responsibilities and enhance performance :


- Understanding of Physical Design Concepts :
  • Matching
  • Electromigration (EM)
  • Electrostatic Discharge (ESD)
  • Latch-Up
  • Shielding
  • Parasitics
- Short Channel Effects

- Critical Thinking & Problem Solving


- Interpersonal and Communication Skills


- Team Collaboration


Educational Qualification : Bachelor's or Master's Degree

The job is for:

Women candidates preferred
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