Barco - Embedded Software Engineer - FPGA Design

About the Role

We are seeking a skilled Configware Developer to join our R&D Team

Job description :

- Hands on experience with any of the FPGA families from AMD, Intel

- Knowledge of FPGA architecture, IO features, IO Constraints

- Thorough Knowledge of digital design fundamentals

- Thorough Knowledge of VHDL

- Static timing analysis, timing optimization, timing constraints, clock domain crossing

- Communication protocols including I2C, SPI, UART, MDIO

- Experience in FPGA bring up activities

- Experience in debugging of RTL issues at functional level or system level

- Working knowledge in transceiver or SerDes based protocol design.

- Awareness of PCI-Express protocol/AXI will be an advantage

Requirements :

- Strong programming skill in Verilog, VHDL and a solid understanding of digital design, static timing analysis and timing closure techniques

- Proficiency in Vivado synthesis and implementation flow for high speed designs and usage of debug tools like ChipscopeSignal tapIdentify debugger

- Proficiency in Zync SoC based development

- Experience in High Speed Digital Interfaces like Aurora, sFPDP, MGT, etc.

- Knowledge working experience on RTOS and its concepts would be added advantage

- Experience in bench verification and working with lab equipment will have added advantage

- Knowledge of embedded C programming is a plus

- Comfortable in Linux environment (like PetaLinux)

- Articulate and able to write clear, well-organized, concise documents

- Excellent written and verbal English Communication skills environment