We are looking for an experienced ASIC Verification Lead to drive end-to-end SoC verification activities and lead a high-performance verification team.

Key Responsibilities :

- Lead SoC-level verification planning, execution, and closure

- Own verification strategy, test planning, and coverage closure

- Drive execution of UVM-based verification environments

- Guide team in testbench development, debug, and root cause analysis

- Review and improve verification architecture and methodology

- Ensure high functional and code coverage closure

- Work closely with RTL design, DFT, and physical design teams

- Manage schedule, quality, and delivery commitments

- Mentor and technically guide junior engineers

Technical Expertise Required :

- Strong experience in SystemVerilog & UVM

- Hands-on exposure to SoC verification (minimum 2 projects)

- Protocol expertise :

1. RISC-V

2. UCIe

3. PCIe

4. MIPI

5. DDR

6. Ethernet

- Strong debugging skills using waveform tools and simulators

Additional Skills :

- Strong understanding of verification methodologies and coverage-driven verification

- Experience in testcase and testbench architecture development

- Knowledge of clock-domain crossing (CDC) and reset strategies

- Exposure to emulation/FPGA platforms is a plus

Leadership Requirements :

- Minimum 1 year of team handling experience

- Ability to lead, mentor, and review team deliverables

- Strong communication with cross-functional stakeholders

Preferred Qualities :

- Ownership mindset and strong problem-solving ability

- Ability to handle complex multi-IP SoC environments

- Strong debugging and analytical thinking skills