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Architect/Lead - Design and Verification - SOC/IP, SystemVerilog/UVM, SOC, RISC-C, Semiconductor Domain

Career Makers
5 - 15 Years
Bangalore

Posted on: 13/08/2026

Job Description

About the Role :

The role involves building and maintaining scalable testbenches, performing functional verification of complex SoCs and subsystems, and collaborating with cross-functional teams to ensure high-quality silicon. The ideal candidate will have experience with AMBA protocols and power management features verification.

Key Responsibilities :

- Develop and execute verification plans for SoC/IP level designs

- Build and maintain scalable testbenches using SystemVerilog/UVM methodology

- Perform functional verification of complex SoCs and subsystems

- Work on AMBA protocols (AXI/AHB/APB) verification

- Verify power management features (PMU, low-power scenarios, UPF-based verification)

- Debug simulation failures and root-cause issues efficiently

- Collaborate with design, architecture, and validation teams to ensure high-quality silicon

- Contribute to coverage closure (functional & code coverage)

Required Skills :

- Strong background in functional verification

- Experience with SystemVerilog/UVM methodology

- Knowledge of AMBA protocols (AXI/AHB/APB)

- Understanding of power management features (PMU, low-power scenarios, UPF-based verification)

Preferred Skills :

- Experience with coverage-driven verification

- Knowledge of simulation tools and methodologies

- Strong debugging and problem-solving skills

Qualifications :

- Strong technical skills and attention to detail

- Ability to work in a team environment and collaborate with cross-functional teams

- Good communication and interpersonal skills

Benefits :

- Opportunity to work on complex SoC/IP level designs

- Collaborative team environment

- Professional development opportunities

Interview Process :

- Initial screening of resumes and cover letters

- Technical interview with the verification team

- Final interview with the hiring manager

Recruiter Summary in 5 concise bullets :

- Develop and execute verification plans for SoC/IP level designs

- Build and maintain scalable testbenches using SystemVerilog/UVM methodology

- Perform functional verification of complex SoCs and subsystems

- Collaborate with cross-functional teams to ensure high-quality silicon

- Contribute to coverage closure and debug simulation failures efficiently

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