Posted on: 17/11/2025
Description :
Position Summary :
We are looking for an experienced Analog Layout Engineer with strong expertise in PAD Ring and Full-Chip Layout. The ideal candidate will work closely with analog, mixed-signal, digital, and packaging teams to deliver high-quality layouts that meet performance, reliability, and manufacturability requirements.
Key Responsibilities :
- Develop and prepare multi-dimensional layouts and detailed drawings of semiconductor devices from schematics and design inputs.
- Perform block-level layout design using Cadence Virtuoso XL.
- Execute block-level and top-level layout verification using Calibre.
- Demonstrate strong experience in PAD Ring, Top-level, and Full-Chip layout.
- Collaborate with analog/mixed-signal and digital design teams to ensure accurate implementation of layout requirements.
- Perform block-level and top-level floor planning, area estimation, and optimization.
- Follow recommended design and verification methodologies, tools, and flows for robust layout development.
- Perform post-layout extraction and coordinate with design teams for analysis.
- Prepare layout documentation and conduct design/layout reviews.
- Work with the packaging team to generate clean bonding diagrams aligned with assembly rules.
Education & Experience :
- Bachelors degree in Electrical/Electronic Engineering or equivalent.
- 610 years of relevant industry experience in analog/mixed-signal layout.
Key Qualifications :
- Strong understanding of package/substrate design and assembly rules for flip-chip, BGA, LFCSP
- Hands-on experience with IO pads, ESD clamps, Analog/Mixed-Signal IP layout.
- Experience with technology nodes such as 180nm, 40nm, and 22nm (GF) is a strong plus.
- Ability to work effectively in multi-disciplinary, multi-cultural, and multi-site environments.
- Strong analytical and problem-solving abilities with a proactive approach to identifying gaps and providing solutions.
- Scripting skills in SKILL, Perl, or TCL are an added advantage.
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Posted By
Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1576327
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