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AMS Verification Engineer

MaimsD Technology
Multiple Locations
8 - 16 Years

Posted on: 03/11/2025

Job Description

Description :


Job Title : AMS Verification Engineer


Location : Bangalore/Hyderabad


Experience : 812 Years


Education : Bachelors or Masters in Electronics / Electrical Engineering / Microelectronics / Computer Science


About the Role :


We are looking for a highly skilled and experienced AMS Verification Engineer to join our team in Bangalore. The ideal candidate will have hands-on expertise in SoC/IP-level verification using AMS methodologies, along with a strong understanding of both analog and digital design domains. This role requires deep technical knowledge, problem-solving ability, and collaboration with cross-functional teams across global sites.


Key Responsibilities :


- Lead and execute AMS verification for complex IPs and SoCs.


- Develop and maintain testbenches, UVM environments, and test cases for AMS verification.


- Perform Model vs. Schematic (MVS) verification and ensure high-quality correlation results.


- Set up and maintain VManager regression environments for automated testing.


- Collaborate with design, modeling, and system teams to ensure functional correctness.


- Debug simulation failures, identify root causes, and drive corrective actions.


- Provide technical mentorship and contribute to continuous flow improvements.


- Work independently and coordinate with global verification teams for seamless project execution.


Required Qualifications :


- Bachelors or Masters degree in Electronics, Electrical Engineering, Microelectronics, or Computer Science.


- 8+ years of hands-on experience in SoC/IP-level AMS verification.


- Strong knowledge of Verilog AMS, SystemVerilog, Real Number Modeling (RNM), Verilog, and/or VHDL.


- Good understanding of UVM methodology and test case development.


- Proficiency in Analog/RF design fundamentals and analog block specifications.


- Hands-on experience in Model vs. Schematic (MVS) verification flow.


- Strong working experience with Cadence design and verification tools.


- Proficiency in C, Tcl, and Perl programming; knowledge of Python or SystemC is a plus.


- Familiarity with SoC architecture, directed and constrained-random verification methodologies.


- Strong analytical and debugging skills; ability to work independently with minimal supervision.


- Excellent communication skills to collaborate effectively with cross-functional and global teams.


Good to Have :


- SystemC or mixed-signal co-simulation experience.


- Exposure to high-speed analog IPs such as SerDes, DDR, or PLLs.


- Knowledge of scripting for automation and verification flow optimization.


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