Sykatiya Technologies Pvt Ltd(India/US) is looking for engineers who don't just run synthesis. but actually fix PPA(Power, Performance, Area).

Let's be real - anyone can execute a flow.

But not everyone can close timing, optimize power, and make area trade-offs that actually matter in silicon.

If you've worked on RTL Synthesis end-to-end, handled real timing closure challenges, and understand the "why" behind constraints - this role is for you.

What we're looking for :

Key Responsibilities :

- Perform RTL synthesis and optimization to meet design goals for timing, power, and area

- Work on logic synthesis flows using industry-standard tools

- Analyze and close timing using STA (Static Timing Analysis) methodologies

- Collaborate with RTL designers, physical design, and verification teams for design convergence

- Debug and resolve synthesis and timing issues across blocks/chips

- Drive design quality improvements with focus on PPA metrics

- Perform design checks including linting, CDC, and LEC

- Contribute to flow enhancements, automation, and methodology improvements

- Ensure adherence to design constraints, low-power intent, and sign-off criteria

Required Skills & Expertise :

- 3 to 10 years of hands-on experience in RTL / Logic Synthesis

Strong expertise in :

- Synopsys Design Compiler or Cadence Genus

- Synopsys PrimeTime for STA and timing closure

Deep understanding of :

- Timing concepts (setup/hold, clock domains, constraints)

- Synthesis optimization techniques

- Low-power design concepts (UPF/CPF is a plus)

- Experience in debugging timing violations and convergence issues

Good to Have :

Exposure to :

- LEC (Logical Equivalence Check) tools (e.g., Formality/Conformal)

- SpyGlass / Linting tools

- CDC/RDC analysis

- Knowledge of scripting languages like TCL, Python, or Shell scripting

- Experience with advanced nodes (e.g., 7nm, 5nm) is an added advantage

Why this role?

You'll work closely with RTL, PD, and DFT teams - not just executing tasks, but influencing real silicon outcomes.