Senior EDA Engineer - Cadence Virtuoso

Description :

We are seeking a highly skilled EDA Engineer with hands-on experience in Cadence Virtuoso environments, OpenAccess (OA) database programming, and SKILL scripting. You will play a key role in building and optimizing analog/mixed-signal design flows, integrating foundry PDKs/CDKs, and automating schematic-layout operations for our next-generation AI design ecosystem.

Responsibilities :

- Develop, maintain, and optimize analog/mixed-signal IC design flows using Cadence Virtuoso and related tools.

- Design and enhance SKILL scripts to automate layout, schematic, verification, and design environment tasks.

- Manage CDF parameters and configurations for foundry PDK/CDK components and libraries.

- Work with OpenAccess (OA) APIs (C++, Python, Tcl) to read, write, and manipulate schematic, layout, and connectivity data.

- Build automation tools leveraging OA for schematic-layout integration, PDK/CDK validation, and design data migration or QA.

- Integrate and validate PDK/CDK devices, pCells, symbols, DRC/LVS decks, and simulation models within the EDA flow.

- Troubleshoot issues related to PDK integration, OA database consistency, and schematic-layout synchronization.

- Create comprehensive technical documentation and contribute to best practices and reusable automation scripts.

- Collaborate with AI and software teams to embed EDA automation into Maieutic's AI Co-Pilot platform.

Requirements :

- 3 to 8 years of experience in Cadence Virtuoso analog/mixed-signal design environments.

- Proficiency in SKILL scripting for automation in schematic and layout flows.

- Strong expertise in CDF management and customization for parametric device libraries.

- Hands-on experience with the OpenAccess (OA) database API using C++ / Python / Tcl

- In-depth understanding of foundry PDK/CDK structures, parameterized cells, symbols, device models, and DRC/LVS decks.

- Proven ability to automate schematic/library processes via SKILL, Tcl, or Python scripting

- Good knowledge of schematic editors and LVS/Schematic-Driven Layout methodologies.

- Proficient in UNIX/Linux environments with strong scripting and command-line skills.

- Experience with version control tools like Git, SOS, or similar.

- Excellent communication and teamwork skills suited to a fast-paced startup environment.

Preferred Qualifications :

- Prior experience at Cadence or leading semiconductor companies working on Virtuoso toolchains

- Familiarity with Spectre, ADE, and analog verification flows.

- Understanding of semiconductor process technologies and device physics for analog/mixed-signal design.

- Exposure to AI/ML-driven EDA automation is a plus.