Senior DFT Engineer

Description :

Experience : 8-12 years in DFT for complex SoC/ASIC environments

Job responsibilities :

- Hands-on with Synopsys DFTMax/TetraMax or Cadence tools

Strong understanding of Scan/Compression & ATPG, MBIST/BIST, Boundary Scan/JTAG (IEEE 1149.x)

- Experience with DFT bring-up and production test on silicon

- Excellent communication skills and proven ability to work with cross-functional teams

- Work on state-of-the-art SoCs and advanced process nodes

- Collaborate with high-performing, innovative engineering teams

- Take ownership of critical DFT initiatives and silicon success

- Opportunity to mentor and grow your career in a cutting-edge technology environment