RTL Design Engineer - FPGA

Experience : 5+ Years

Location : PAN India

Notice Period : Immediate to 30 Days Max.

Job Description :

- Design, develop, and verify FPGA modules using Verilog.

- Work with Vivado for synthesis, simulation, and implementation.

- Develop solutions on Xilinx Zynq UltraScale+ platforms.

- Integrate and interface peripherals such as I2C, SPI, DDR, EMMC, AMBA, PL, PS, etc.

- Collaborate with hardware, software, and system teams for end-to-end design delivery.

- Strong hands-on experience with Verilog.

- Proficiency with Xilinx Vivado design suite.

- Strong knowledge of FPGA architecture, synthesis flows, and timing closure.

- Experience working with Xilinx Zynq UltraScale+ FPGA family.

- Expertise in interfacing protocols such as I2C, SPI, DDR, EMMC, AMBA, etc.