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Job Description : We are looking for a highly skilled and motivated Physical Design Lead with deep expertise in Netlist-to-GDSII implementation. The ideal candidate will have a strong technical background in advanced process nodes, along with hands-on experience in leading end-to-end physical design activities using industry-standard EDA tools. Key Responsibilities : - Lead physical design activities for complex SoCs or IPs from Netlist to GDSII. - Own and drive stages such as Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, and Physical Verification (LVS/DRC). - Perform Static Timing Analysis (STA) and drive timing closure with cross-functional teams. - Conduct Power Integrity Analysis including IR Drop and EM checks. - Ensure compliance with advanced technology requirements (28nm and below). - Optimize design for performance, power, and area (PPA). - Collaborate with cross-functional teams (RTL, DFT, Verification, Package, and Foundry) for physical design sign-off. - Drive methodology improvements and best practices across multiple projects. - Mentor and guide junior team members in technical and project matters. - Coordinate with global teams, and communicate project status effectively. Technical Skills & Experience : - Physical Design Expertise : Proven experience in Netlist-to-GDSII flow including Floorplan, Placement, CTS, Routing, and Signoff. - Technology Nodes : Experience with 28nm, 16nm, 7nm, or lower technology nodes. Tools : - Synopsys : ICC2, Primetime, PT-PX - Cadence : Innovus - Signoff : Calibre for LVS/DRC - Scripting : Proficiency in Tcl, Perl, and/or Python for automation and flow customization. - STA and Constraints : Strong grasp of timing constraints, STA concepts, and timing closure strategies. - Low Power Design : Exposure to UPF-based flows and low-power design techniques is a plus. Soft Skills : - Strong communication, leadership, and collaboration abilities to lead teams and interface with global stakeholders. Preferred Qualifications : - Bachelor's or Master's degree in Electrical/Electronics Engineering or related field. - Exposure to high-frequency, high-complexity SoC/ASIC designs. - Familiarity with ECO implementation and tape-out closure. - Experience in technical leadership or team lead roles in a multi-site development environment.

Anywhere in India/Multiple Locations

Physical Design Engineer - ASIC/EDA 

Job Description for Physical Design Engineer - ASIC/EDA  in Bharat Head Hunters in  Anywhere in India/Multiple Locations for (5-10) years of experience. Apply Now!

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