Posted on: 06/08/2025
Key Responsibilities :
- Develop and implement DFT architecture with a focus on MBIST for advanced SoCs.
- Integrate MBIST IPs, generate test insertion and verification infrastructure.
- Work on DFT planning, insertion, simulation, and pattern generation.
- Perform ATPG and MBIST pattern generation and debug failures from silicon bring-up.
- Collaborate with RTL, Physical Design, and Verification teams throughout the design cycle.
- Support silicon bring-up and yield improvement activities post-silicon.
- Ensure high coverage and test quality in scan and MBIST.
Required Skills and Experience :
- Minimum 7+ years of hands-on experience in DFT with a strong focus on MBIST.
- Proficient in tools such as Synopsys DFT Compiler, Tessent (Mentor), or equivalent.
- Solid understanding of scan insertion, ATPG, boundary scan, and JTAG.
- Experience with memory test algorithms, repair analysis, and pattern generation.
- Familiarity with scripting languages (TCL, Perl, Python) for automation.
- Strong analytical and problem-solving skills with the ability to work independently
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HR at Tessolve Semiconductor Pvt Ltd
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Posted in
Semiconductor/VLSI/EDA
Functional Area
Embedded / Kernel Development
Job Code
1525977
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