Posted on: 06/02/2026
Job Description :
In your new role you will :
- Lead the digital verification of complex digital design Ips and Subsystems, ASIC and SoCs.
- Coordinate the overall digital verification activities such as verification planning, verification tracking and reporting, as well as requirement-based verification
- Collaborate with cross-functional teams, including concept, design to ensure high quality designs
- Hands-on contributor to digital verification either from scratch, or using legacy verification environments and flows
- Focus on reuse of the Verification Components to be implemented.
- Identify and mitigate risks in dynamic projects, with proactive communication to the project team
- Drive the enhancement of existing verification methodologies and flows, drive required innovation projects and get buy-in from management
- Foster process and efficiency improvements where applicable, as well as share your expertise to the other team members so that they can grow.
- As a technical lead inspire and mentor junior verification engineers while providing invaluable technical support and guidance to development teams and business partners
- Identify and address synergies between Pre-Silicon verification and post-silicon validation.
- You are a seasoned expert in digital verification, with a strong background in leading the development of complex digital designs, including IPs, Subsystems, ASICs, and SoCs.
- You excel in driving innovation, collaboration, and process improvements, with a passion for mentoring and growing high-performing teams.
Your Profile :
- 10-17+ years of Digital Verification experience and a deep understanding of all technical aspects of Verification, including 3+years of leadership activities
- Masters/bachelor's in electrical/Electronic Engineering or Computer Science.
- Familiarity with version-controlling (eg, Git/Bitbucket, Clear Case,CVS, SVN) and bug-management systems (eg, JIRA).
- Good to have: Knowledge of ISO26262 and ISO21434.
- Outstanding Expertise in digital verification and all tasks needed to achieve design verification closure, including state of the art tools and methodologies (SV-UVM, Xcelium, vManager, Certitude, etc)
- Verification experience in Graphics IP design, cryptographic hardware IP design is a plus.
- A sense of urgency for upcoming innovation in the field of verification
- Proven leadership skills, with experience in coordinating activities, providing technical guidance, and mentoring junior engineers.
- Self-motivated, flexible, good communication with inter personal skills and is a good team player who can work well with both internal and external partners
- Candidate has proven ability to achieve results in a very dynamic, multi-site environment and be able to coordinate with priorities and self-initiatives
- A proven ability to solve problems with higher complexity bypro-actively involving expert networks
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Posted in
Semiconductor/VLSI/EDA
Functional Area
QA & Testing
Job Code
1610576