Happiest Minds - FPGA RTL Design Engineer

Description :

Job Title : FPGA RTL Design Engineer - 5G Wireless Domain OR Ethernet packet processing domain

Location : Anywhere in India

Experience : 10+ years

About the Role :

FPGA RTL Design Engineers with deep expertise in the wireless communication domain or wireline high speed packet processing, who can implement data path for 5G products.

You will work closely with the customer to develop cutting-edge wireless signal processing or packet processing blocks while maintaining performance, area, and power efficiency requirements.

Key Responsibilities :

- Work with system architect to understand the packet processing requirements

- Develop RTL architecture and microarchitecture based on the requirements

- Implement RTL (VHDL), perform functional verification, linting, and synthesis of RTL designs

- Implement on FPGA systems and validate the performance

- Collaborate with verification, and firmware teams to ensure end-to-end integration and functionality

- Optimize designs for power, performance, and area (PPA) targets

- Support bring-up and on board validation as required

Required Skills & Experience :

- Skilled in architecting complex FPGA designs for high throughput

- Strong RTL design skills targeting FPGA in VHDL mandatory

- Should have good exposure in high-speed packet processing in FPGA

- Good knowledge of digital signal processing fundamentals will be advantageous

- Understanding of wireless communication standards (e.g., 5G ORAN, NR, LTE, Wi-Fi, etc.) is good to have

- Exposure in Altera Agilex devices or AMD Zynq RFSoC devices preferred

- Experience in upper layer protocol implementation in wireless domain

- Familiarity with verification methodologies (UVM/SystemVerilog preferred)

- Experience in FPGA design flow including synthesis, implementation, STA and timing closure

- Good debugging skills and ability to analyze RTL and simulation mismatches

Preferred Qualifications :

- M.Tech / B.Tech in Technical Domain, or a related field

- Experience with FPGA tools (e.g., Xilinx, Intel/Altera)

- Knowledge of scripting languages like Python, Tcl, or Perl

- Familiarity with tools such as ModelSim, Questa, Synopsys DC, VCS, SpyGlass, or Vivado