About Cadence :

Cadence Design Systems is a global leader in electronic systems design, with over three decades of innovation in computational software and hardware. Guided by our Intelligent System Design strategy, we enable customers across hyperscale computing, automotive, mobile, aerospace, and consumer sectors to create transformative products that shape the future of technology.

Cadence is consistently ranked among Fortunes 100 Best Companies to Work For and fosters a culture built on innovation, collaboration, and continuous learning.

Position Overview :

We are seeking a highly experienced Principal Physical Design Engineer to join our cutting-edge IC design team in Bengaluru. You will play a critical role in executing and optimizing the physical design of complex, high-performance SoCs (System on Chips). This leadership position requires both deep technical expertise and a collaborative mindset to drive design execution from RTL to GDSII.

Key Responsibilities :

- Lead and contribute to the complete physical design flow including :- Floorplanning, Placement, CTS (Clock Tree Synthesis), Routing, and Physical Verification

- Drive design convergence on timing (STA), power (IR drop, dynamic), and area using industry-standard tools and methodologies

- Collaborate with RTL design, DFT, STA, and package/board teams to ensure seamless integration and optimal performance

- Identify and resolve complex physical implementation issues across corners and modes

- Leverage EDA tools such as Cadence Innovus, Synopsys ICC2, and PrimeTime for design and analysis

- Automate and streamline design workflows using TCL, Perl, Python, and Shell scripting

- Mentor and guide junior engineers, perform design reviews, and support continuous skill development within the team

- Ensure physical design deliverables meet aggressive project schedules and quality benchmarks

Required Qualifications :

- Bachelors or Masters degree in Electrical Engineering, Electronics, or VLSI Design

- 812 years of hands-on experience in advanced node (?7nm) physical design and implementation

- Proven expertise in :

1. Floorplanning, power planning, place & route, STA, and sign-off verification

2. Physical verification (DRC/LVS), EM/IR analysis, and signal integrity

- Strong scripting skills for flow automation (TCL, Python, Perl, Shell)

- Excellent analytical, debugging, and problem-solving skills

- Exceptional interpersonal and communication skills with experience working in cross-functional global teams

- Experience in leading small teams or mentoring junior engineers is a significant advantage