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Principal/Lead RTL Design Engineer - ASIC/SoC
Multiple Locations
Senior RTL Design Engineer - ASIC/SoC
RTL Design Engineer
Design Verification Engineer - System Verilog
Design Verification Engineer - PCI-e/SystemC
Bangalore/Chennai/Hyderabad
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Chennai/Pune
Staff Engineer/Senior Staff Engineer - RTL/SoC
Bangalore/Chennai
Tessolve - Lead RTL Design Engineer
eInfochips - ASIC RTL Design Engineer
Happiest Minds - Senior ZeBu Emulation Engineer - Pre Silicon Validation
Pune/Bangalore
Principal Engineer - Systems Validation
Bangalore
ACL Digital - Post-Silicon Debug Engineer - SoC Platform
ACL Digital - RTL Design Engineer - System Verilog
ACL Digital - Verification/Firmware Engineer
Design Engineer - RTL/System Verilog
Bangalore/Noida
QFocus - Software Engineer - Emulation/FPGA
Sima.ai Technologies - Senior Staff DFT Engineer
Senior Design Verification Engineer - IP/SoC Verification
BITSILICA - ASIC Verification Lead - Verification
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